JPH0364891B2 - - Google Patents

Info

Publication number
JPH0364891B2
JPH0364891B2 JP59115428A JP11542884A JPH0364891B2 JP H0364891 B2 JPH0364891 B2 JP H0364891B2 JP 59115428 A JP59115428 A JP 59115428A JP 11542884 A JP11542884 A JP 11542884A JP H0364891 B2 JPH0364891 B2 JP H0364891B2
Authority
JP
Japan
Prior art keywords
memory
processing
control
circuit
data
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP59115428A
Other languages
English (en)
Japanese (ja)
Other versions
JPS60262253A (ja
Inventor
Fumyuki Kato
Satoshi Terasaki
Tetsuya Yoshimura
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
National Institute of Advanced Industrial Science and Technology AIST
Original Assignee
Agency of Industrial Science and Technology
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Agency of Industrial Science and Technology filed Critical Agency of Industrial Science and Technology
Priority to JP59115428A priority Critical patent/JPS60262253A/ja
Publication of JPS60262253A publication Critical patent/JPS60262253A/ja
Publication of JPH0364891B2 publication Critical patent/JPH0364891B2/ja
Granted legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Image Processing (AREA)
  • Memory System (AREA)
  • Controls And Circuits For Display Device (AREA)
JP59115428A 1984-06-07 1984-06-07 メモリデ−タ処理回路 Granted JPS60262253A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP59115428A JPS60262253A (ja) 1984-06-07 1984-06-07 メモリデ−タ処理回路

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP59115428A JPS60262253A (ja) 1984-06-07 1984-06-07 メモリデ−タ処理回路

Publications (2)

Publication Number Publication Date
JPS60262253A JPS60262253A (ja) 1985-12-25
JPH0364891B2 true JPH0364891B2 (en]) 1991-10-08

Family

ID=14662322

Family Applications (1)

Application Number Title Priority Date Filing Date
JP59115428A Granted JPS60262253A (ja) 1984-06-07 1984-06-07 メモリデ−タ処理回路

Country Status (1)

Country Link
JP (1) JPS60262253A (en])

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH07109545B2 (ja) * 1987-02-17 1995-11-22 日本電気株式会社 表示装置
JP2647380B2 (ja) * 1987-02-18 1997-08-27 キヤノン株式会社 カラー画像処理装置
DE3804938C2 (de) * 1987-02-18 1994-07-28 Canon Kk Bildverarbeitungseinrichtung
JP2626294B2 (ja) * 1991-03-22 1997-07-02 株式会社富士通ゼネラル カラー画像処理装置
JP2757641B2 (ja) * 1991-12-09 1998-05-25 株式会社富士通ゼネラル カラー画像処理装置
KR960042372A (ko) * 1995-05-10 1996-12-21 가나이 쯔또무 멀티채널 메모리시스템, 전송정보 동기화방법 및 신호전송회로
KR102395463B1 (ko) * 2017-09-27 2022-05-09 삼성전자주식회사 적층형 메모리 장치, 이를 포함하는 시스템 및 그 동작 방법

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5925255B2 (ja) * 1977-02-18 1984-06-15 日本電気株式会社 デ−タ貯蔵装置
JPS58149556A (ja) * 1982-02-27 1983-09-05 Fujitsu Ltd 並列処理装置

Also Published As

Publication number Publication date
JPS60262253A (ja) 1985-12-25

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Legal Events

Date Code Title Description
EXPY Cancellation because of completion of term